From c61b2d3e412528365a96ae00604f3f48046102f2 Mon Sep 17 00:00:00 2001
From: ainyan03 <205502311+ainyan03@users.noreply.github.com>
Date: Wed, 14 Oct 2026 06:59:55 +0000
Subject: [PATCH] Core2: reset the LCD through the AXP2101 bit on the new PMIC

Panel_M5StackCore2_T::rst_control always toggled AXP192 reg 0x96 bit1 (GPIO4 = LCD RST).
On the AXP2101 (Core2 v1.1 and later) reg 0x96 is the BLDO1 voltage, which powers the
backlight, so every panel init nudged the backlight voltage and never reset the LCD.
The panel now carries the reset register, set at construction from the detected PMIC:
0x90 bit1 (ALDO2 enable) on the AXP2101, the same bit the detector already uses.
---
 src/M5GFX.cpp                              | 10 ++++++++--
 src/board_detect/m5/esp32_d0wdq6_setup.inl | 15 ++++++++++++---
 2 files changed, 20 insertions(+), 5 deletions(-)

diff --git a/src/M5GFX.cpp b/src/M5GFX.cpp
index 20e34097..1008c672 100644
--- a/src/M5GFX.cpp
+++ b/src/M5GFX.cpp
@@ -201,13 +201,19 @@ namespace m5gfx
       this->_rotation = 0; // default rotation
     }
 
+    /// LCD reset line on the PMIC: AXP192 reg 0x96 bit1 (GPIO4), AXP2101 reg 0x90 bit1 (ALDO2 enable).
+    /// On the AXP2101, reg 0x96 is the BLDO1 (backlight) voltage, so it must not be used there.
+    void setResetReg(uint8_t reg) { _rst_reg = reg; }
+
     void rst_control(bool level) override
     {
       uint8_t bits = level ? 2 : 0;
       uint8_t mask = level ? ~0 : ~2;
-      // AXP192 reg 0x96 = GPIO3&4 control
-      lgfx::i2c::writeRegister8(axp_i2c_port, axp_i2c_addr, 0x96, bits, mask, axp_i2c_freq);
+      lgfx::i2c::writeRegister8(axp_i2c_port, axp_i2c_addr, _rst_reg, bits, mask, axp_i2c_freq);
     }
+
+  private:
+    uint8_t _rst_reg = 0x96;
   };
   using Panel_M5StackCore2  = Panel_M5StackCore2_T<lgfx::Panel_ILI9342>;
   using Panel_M5StackCore2E = Panel_M5StackCore2_T<lgfx::Panel_ILI9342E>;
diff --git a/src/board_detect/m5/esp32_d0wdq6_setup.inl b/src/board_detect/m5/esp32_d0wdq6_setup.inl
index a5a15d2d..db9319df 100644
--- a/src/board_detect/m5/esp32_d0wdq6_setup.inl
+++ b/src/board_detect/m5/esp32_d0wdq6_setup.inl
@@ -45,12 +45,21 @@ namespace m5
                             const spi_bus_desc_t& bus_desc, display_parts_owner_t* out)
   {
     out->bus.reset(make_spi_bus(bus_desc));
+    // Same LCD reset bit as the detector's AXP2101 variant (reset2101 / release2101).
+    const std::uint8_t rst_reg = (result.option & generated_options::core2::new_pmic) ? 0x90 : 0x96;
     if (result.option & lcd_e_option)
     {
-      out->panel.reset(make_panel<Panel_M5StackCore2E>(panel_core, out->bus.get()));
-      _set_ili9342e_read(static_cast<lgfx::Panel_ILI9342*>(out->panel.get()), bus_desc.freq_read);
+      auto panel = static_cast<Panel_M5StackCore2E*>(make_panel<Panel_M5StackCore2E>(panel_core, out->bus.get()));
+      panel->setResetReg(rst_reg);
+      out->panel.reset(panel);
+      _set_ili9342e_read(panel, bus_desc.freq_read);
+    }
+    else
+    {
+      auto panel = static_cast<Panel_M5StackCore2*>(make_panel<Panel_M5StackCore2>(panel_core, out->bus.get()));
+      panel->setResetReg(rst_reg);
+      out->panel.reset(panel);
     }
-    else { out->panel.reset(make_panel<Panel_M5StackCore2>(panel_core, out->bus.get())); }
   }
 
   construct_status_t construct_core2(const board_result_t& result, display_parts_t* parts)