From 52f608c756e04cd17953ea220879dedf85daaed2 Mon Sep 17 00:00:00 2001 From: Dhruvin Rajpura Date: Wed, 23 Sep 2026 16:54:17 +0530 Subject: [PATCH] PENDING: arm64: dts: qcom: nord: add ADC-TM thermistor channels for Nord PMICs PMAU0102 (Kai_MV) and PMM8650AU's Kobra_MM ADC5 Gen3 controllers only expose REF_GND/1P25VREF/DIE_TEMP calibration channels; none of their AMUX thermistor pins are wired up, so none of the board thermistor rails feed the thermal framework. Per IPCAT (chipio/systemio/chip/567, NordDC column), only 3 AMUX pins are actually wired to thermistors on Nord, all on Kai and none on Kobra: Kai instance E's AMUX1 (SDRAM3 THERM) and Kai instance I's AMUX1/AMUX2 (SDRAM1 THERM, UFS THERM). Kai's other AMUX pins are either DO_NOT_USE or wired to voltage-rail monitors, not thermistors, so add only these 3 channels. There is no thermistor table yet to finalize pull-up-tier or trip-point values, so these use the standard 100K pull-up default and generic hot/critical trip points; expect these to be revisited once real thermistor data is available. Add #thermal-sensor-cells = <1> to the two Kai adc@ nodes that gain a channel (Gen3 binding requires this on the controller itself, unlike Gen1/Gen2/PMIC7 which use a separate adc-tm node), the new AMUX1[/AMUX2]_THM channel(s) with qcom,adc-tm, and a per-channel thermal-zone for each, following the existing Gen3/Gen4 board pattern of a direct thermal-sensors phandle into the ADC channel. Signed-off-by: Dhruvin Rajpura --- arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi | 80 +++++++++++++++++++++ 1 file changed, 80 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi index 426423b8ed011..41c21ab3a1ea1 100644 --- a/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi +++ b/arch/arm64/boot/dts/qcom/pmau0102-nord.dtsi @@ -30,6 +30,7 @@ #size-cells = <0>; interrupts-extended = <&spmi_bus 0x4 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@400 { reg = ; @@ -48,6 +49,14 @@ label = "pmau0102_e_die_temp"; qcom,pre-scaling = <1 1>; }; + + channel@444 { + reg = ; + label = "pmau0102_e_sdram3_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; }; pmau0102_e_gpios: gpio@8800 { @@ -242,6 +251,7 @@ #size-cells = <0>; interrupts-extended = <&spmi_bus 0x8 0x72 0x1 IRQ_TYPE_EDGE_RISING>; #io-channel-cells = <1>; + #thermal-sensor-cells = <1>; channel@800 { reg = ; @@ -260,6 +270,22 @@ label = "pmau0102_i_die_temp"; qcom,pre-scaling = <1 1>; }; + + channel@844 { + reg = ; + label = "pmau0102_i_sdram1_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; + + channel@845 { + reg = ; + label = "pmau0102_i_ufs_therm"; + qcom,ratiometric; + qcom,hw-settle-time = <200>; + qcom,adc-tm; + }; }; pmau0102_i_gpios: gpio@8800 { @@ -447,6 +473,24 @@ }; }; + pmau0102_e_sdram3_thermal: pau-e-sdram3-therm { + thermal-sensors = <&pmau0102_e_adc ADC5_GEN3_AMUX1_THM_100K_PU(4)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + pmau0102_f_thermal: pmau0102-f-thermal { polling-delay-passive = <100>; thermal-sensors = <&pmau0102_f_mbg_temp>; @@ -495,6 +539,42 @@ }; }; + pmau0102_i_sdram1_thermal: pau-i-sdram1-therm { + thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX1_THM_100K_PU(8)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + + pmau0102_i_ufs_thermal: pau-i-ufs-therm { + thermal-sensors = <&pmau0102_i_adc ADC5_GEN3_AMUX2_THM_100K_PU(8)>; + + trips { + trip0 { + temperature = <70000>; + hysteresis = <2000>; + type = "hot"; + }; + + trip1 { + temperature = <90000>; + hysteresis = <2000>; + type = "hot"; + }; + }; + }; + pmau0102_j_thermal: pmau0102-j-thermal { polling-delay-passive = <100>; thermal-sensors = <&pmau0102_j_mbg_temp>;