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Add Firefly AIBOX K3 as a new RISC-V architecture - #328
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julianmorillo wants to merge 1 commit into
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julianmorillo wants to merge 1 commit into
julianmorillo wants to merge 1 commit into
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boegel
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Oct 28, 2026
| "riscv64/sifive/p550" "0x489" "rv64imafdch_zicsr_zifencei_zba_zbb_sscofpmf" # HiFive Premier P550 | ||
| "riscv64/spacemit/x60" "0x710" "rv64imafdcv_sscofpmf_sstc_svpbmt_zicbom_zicboz_zicbop_zihintpause" # Banana Pi F3 | ||
| "riscv64/spacemit/x60-k6.6" "0x710" "rv64imafdcv_zicbom_zicboz_zicntr_zicond_zicsr_zifencei_zihintpause_zihpm_zfh_zfhmin_zca_zcd_zba_zbb_zbc_zbs_zkt_zve32f_zve32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkt_sscofpmf_sstc_svinval_svnapot_svpbmt" # Banana Pi F3 k6.6 | ||
| "riscv64/spacemit/x100" "0x710" "rv64imafdcvh_zicbom_zicbop_zicboz_zicntr_zicond_zicsr_zifencei_zihintntl_zihintpause_zihpm_zimop_zaamo_zalrsc_zawrs_zfa_zfh_zfhmin_zca_zcb_zcd_zcmop_zba_zbb_ze32x_zve64d_zve64f_zve64x_zvfh_zvfhmin_zvkb_zvkg_zvkned_zvknha_zvknhb_zvksed_zvksh_zvkt_smaia_smstateen_ssaia_sscofpmf_sstc_svinval_svnapot_svpbmt_sdtrig" # Firefly AIBOX K3 |
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I don't mind this being merged, good enough for now, but shouldn't we be using RISC-V profiles as CPU targets?
Not sure if this is the best source of info, but looks official: https://docs.riscv.org/reference/profiles-overview/index.html
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The approach of using RISC-V profiles is considered here: #243
But in the meantime it would be great to have this merged to quickly test RVV 1.0 builds in the context of MultiXscale.
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