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Add PCG64DXSM and MRG32k3a bit generators to dpnp.random - #3161
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PCG64DXSM is a custom engine bit-identical with NumPy's for raw values, random, uniform and bytes, drawn in a sequential layout for the samplers taking a fixed number of draws. MRG32k3a uses oneMKL's device engine, with work-item w on substream w. sycl::mul_hi is replaced with a limb-based umul_hi, as DPC++ 2026.2 miscompiles it on Intel GPUs.
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View rendered docs @ https://intelpython.github.io/dpnp/pull/3161/index.html |
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Array API standard conformance tests for dpnp=0.22.0dev0=np2py314h8d9cdd5_31 ran successfully. |
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Coverage is 81.826% — feature/device-rng-bit-generators into feature/device-rng-multivariate. No base build found for |
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This PR adds two more bit generators to
dpnp.random, as part of the series splitting #3147. It is stacked on #3160PCG64DXSM, a custom engine (oneMKL'spcg64_dxsmhas a hard-coded increment) that is bit-identical with NumPy's forrandom_raw,random(f32/f64),uniformandbytes, and exchanges states withnumpy.random.PCG64DXSM. The samplers taking a fixed number of draws per element use a new sequential layout, which reproduces NumPy's stream order; the others give work-itemwthe stream of NumPy'sjumped(w)MRG32k3a, on oneMKL's devicemrg32k3a, where work-itemwdraws from substreamw. Each work-item produces 128 elements, since moving to a substream costs a matrix product per digit, and 8 elements per work-item were 2x (GPU) to 10x (CPU) slower than Philoxitems_per_work_itemis now a per-engine trait, exposed to Python as_rng_impl.items_per_work_item