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alpha: sign-extend memory-format displacement - #3036

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Rot127 merged 2 commits into
capstone-engine:nextfrom
Samin061:alpha-mem-disp-signext
Oct 9, 2026
Merged

Rot127 merged 2 commits into
capstone-engine:nextfrom
Samin061:alpha-mem-disp-signext

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Your checklist for this pull request

  • I've documented or updated the documentation of every API function and struct this PR changes.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

The Alpha memory-format instructions (lda, the integer loads/stores, the store-conditional forms, and the lds/ldt/sts/stt float loads and stores) carry a 16-bit displacement that the ISA treats as signed, but the decoder read it out of the instruction word as a plain unsigned field and never sign-extended it, so any displacement with bit 15 set decoded to a large positive value. cstool -d alpha 0xb0,0xb0,0x42,0x20 shows it: the offset prints as 0xb0b0 and operands[1].imm is 0xb0b0, where it should be -20304. The displacement is read in the shared decode macro at the four memory-format cases (indices 1, 22, 23, 24), each storing fieldFromInstruction_4(insn, 0, 16) straight into the operand. Casting that field through int16_t at those four sites stores the signed offset, so the same word now decodes to lda $2,-0x4f50($2). Positive displacements are unaffected.

Test plan

cstool -d alpha 0xb0,0xb0,0x42,0x20 now prints lda $2,-0x4f50($2) with operands[1].imm = 0xffffffffffffb0b0. I added negative-displacement cases to tests/MC/Alpha/insn-alpha.s.yaml covering the integer, store-conditional and float-memory forms, and updated the two detail cases in tests/details/alpha.yaml and tests/details/cs_common_details.yaml that had captured the old unsigned value.

Closing issues

closes #3021

Comment thread arch/Alpha/AlphaGenDisassemblerTables.inc
@github-actions github-actions Bot added the Auto-Sync-files Auto-Sync label Aug 26, 2026

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Please rebase

@Rot127

Rot127 commented Sep 24, 2026

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@Samin061 Ping :)
I'd like to include this one in the hotfix Alpha12 release on the weekend.

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Samin061 force-pushed the alpha-mem-disp-signext branch from 1539bf3 to 01e3f1f Compare October 5, 2026 19:08
@Samin061

Samin061 commented Oct 5, 2026

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Sorry for the delay. Rebased onto current next, no conflicts.

#3034 added 01_remove_codegen_scratch_register.patch for Alpha in the meantime, so I renumbered mine to 02_mem_disp_sign_extend.patch. Both apply cleanly in order with git apply --recount, and the Alpha MC, details and issues tests pass locally on the rebased branch.

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codecov Bot commented Oct 5, 2026

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Codecov Report

✅ All modified and coverable lines are covered by tests.
⚠️ Please upload report for BASE (next@992e6d7). Learn more about missing BASE report.

Additional details and impacted files
@@           Coverage Diff           @@
##             next    #3036   +/-   ##
=======================================
  Coverage        ?   61.09%           
=======================================
  Files           ?      243           
  Lines           ?    56756           
  Branches        ?    10063           
=======================================
  Hits            ?    34676           
  Misses          ?    16871           
  Partials        ?     5209           

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@Rot127
Rot127 merged commit 889185e into capstone-engine:next Oct 9, 2026
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alpha: Signed memory-format offset interpreted as unsigned

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