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perf(pt): banded Wigner-D storage for the fused inference consumers - #6071
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| Check name | Status | Explanation | Resolution |
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Docstring coverage is 64.41% which is insufficient. The required threshold is 80.00%. Docstring coverage is scoped to functions touched by this diff. Analyzed 59 functions across 9 files. | Write docstrings for the functions missing them to satisfy the coverage threshold. |
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Check name Status Explanation Description Check Check skipped - CodeRabbit’s high-level summary is enabled. Title check The title clearly and concisely describes the main change: adding banded Wigner-D storage for fused inference consumers. Linked Issues check Check skipped because no linked issues were found for this pull request. Out of Scope Changes check Check skipped because no linked issues were found for this pull request.
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Review comments at @deepmd/pt/model/descriptor/sezm_nn/edge_cache.py:
- Around line 666-681: Update the packed-storage gate in _build_edge_wigner to
enable packed layout only when every selected consumer supports its packed
offsets. Keep dense Wigner matrices for dense SO2 consumers and for cuTile
unless its launcher explicitly supports packed offsets; do not use
_flash_atten_fn availability alone as the capability check.
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deepmd/pt/model/descriptor/sezm_nn/edge_cache.pydeepmd/pt/model/descriptor/sezm_nn/embedding.pydeepmd/pt/model/descriptor/sezm_nn/so2.pydeepmd/pt/model/descriptor/sezm_nn/wignerd.pydeepmd/pt_expt/kernels/triton/sezm/so2_value_path.pydeepmd/pt_expt/kernels/utils.pysource/tests/pt/model/test_descriptor_sezm_triton.py
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Added two follow-up commits that remove the redundant Wigner runs the banded layout initially paid for on the compiled backward:
Numbers on the DPA4-Neo N=4096 frame (RTX 5090, same tree, flag on vs the previous head 0278e45):
Monomial forward launches per frame drop from 4 to 2 (the band assembly only). Correctness against the previous head: energy rel 1.7e-9, forces rel 1.1e-6 (same noise floor as before); the band operator's forward and backward are bitwise-equal to the plain composition in eager tests, and the existing dense/band bitwise suite still passes. |
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@OutisLi @wanghan-iapcm @njzjz requesting a review, please. Following the 2026-10-13 discussion we validated the combined stack of our six performance PRs (#6056, #6057, #6060, #6070, #6071, #6072) with a multi-scale gate: diamond + bcc-Cu at ~500 / ~2000 / ~4400 atoms, three columns (pure torch.compile with all custom kernels off / current master / our changes on). All accuracy cells sit within 2.2x the pure baseline's own run-to-run band (criterion: 3x), and no tested atom count regresses in time or memory — full numbers in the PR descriptions. Suggested review order for the six: #6056 -> #6057 -> #6060 (small and self-contained) -> #6070 -> #6071 -> #6072. |
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Follow-up: |
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One more sweep-tooling fix on this branch ( |
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Review comments at @deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py:
- Line 2012: Update the fp16x3 backward-path comment to state that it computes
the input gradient from grad_out, the weights, and saved z_all without a
separately returned identity input; remove the claim that it recovers that input
internally.
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deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py
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| ) | ||
| x_fp16_speed, z_fp16_speed, u_fp16_speed = _mixing_stack_fp16x3_op( | ||
| # the fp16x3 operator returns (x_local, z_all); its backward | ||
| # recovers the final identity input internally, unlike the fp32 one |
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📐 Maintainability & Code Quality | 🟡 Minor | ⚡ Quick win
🔎 Supported by static analysis
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set -euo pipefail
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ast-grep outline "$file" --items all
rg -n -C 10 'mixing_stack_fp16x3_bwd_op|RECOVER_INPUT|identity' \
deepmd/pt_expt/kernels/triton/sezm --glob '*.py'Repository: deepmodeling/deepmd-kit
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print(f"--- {path}:{start}-{end} ---")
for n in range(start, end + 1):
print(f"{n}: {lines[n-1]}")
block("deepmd/pt_expt/kernels/triton/sezm/so2_stack_fp16x3.py", 440, 605)
block("deepmd/pt_expt/kernels/triton/sezm/so2_stack_fp16x3.py", 605, 760)
block("deepmd/pt_expt/kernels/triton/sezm/so2_value_path.py", 1700, 1785)
block("deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py", 1998, 2048)
PYRepository: deepmodeling/deepmd-kit
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Correct the backward-path comment.
The fp16x3 backward does not recover the final identity input. It computes the input gradient from grad_out, the weights, and saved z_all. Update the note:
Suggested comment fix
--- "a/deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py"
+++ "b/deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py"
@@ -2009,7 +2009,8 @@
u0, alpha, w0_all, w1_all, gw_all, lmax, cf, True
)
# the fp16x3 operator returns (x_local, z_all); its backward
- # recovers the final identity input internally, unlike the fp32 one
+ # computes the input gradient from grad_out and saved z_all without
+ # the fp32 path's separately returned identity input
x_fp16_speed, z_fp16_speed = _mixing_stack_fp16x3_op(
u0, alpha, w0_all, w1_all, gw_all, lmax, cf, True
)📝 Committable suggestion
‼️ IMPORTANT
Carefully review the code before committing. Ensure that it accurately replaces the highlighted code, contains no missing lines, and has no issues with indentation. Thoroughly test & benchmark the code to ensure it meets the requirements.
| # recovers the final identity input internally, unlike the fp32 one | |
| # computes the input gradient from grad_out and saved z_all without | |
| # the fp32 path's separately returned identity input |
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Review comment at @deepmd/pt_expt/kernels/triton/sezm/sweep_tile_configs.py at
line 2012:
Update the fp16x3 backward-path comment to state that it computes the input
gradient from grad_out, the weights, and saved z_all without a separately
returned identity input; remove the claim that it recovers that input
internally.
After applying the fix, consider running `coderabbit review --agent` for local
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I reviewed the exact head. The existing edge-cache finding remains a correctness blocker: packed storage can be selected while dense SO2 or cuTile consumers still use dense offsets, causing failures or incorrect aggregates. Please gate storage on all selected consumers' packed-layout support and fix the failing documentation check.
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I reviewed the exact head. The existing edge-cache finding remains a correctness blocker: packed storage can be selected while dense SO2 or cuTile consumers still use dense offsets, causing failures or incorrect aggregates. Please gate storage on all selected consumers' packed-layout support and fix the failing documentation check.
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Thank you for the review — you are right that selecting the banded layout while a dense-layout consumer is active is a real hazard. Addressed in e92fd5c:
On the documentation check: the RTD failure is repo-wide (same red check on other open PRs, e.g. #6058); this diff touches no docs inputs. |
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Inline comments:
Review comments at @deepmd/pt/model/descriptor/sezm.py:
- Line 126: Move the “SeZM” registration decorator from
block_supports_packed_wigner to DescrptSeZM, keeping it alongside the class’s
existing registrations. Leave the helper function undecorated.
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deepmd/pt/model/descriptor/sezm.pydeepmd/pt/model/descriptor/sezm_nn/edge_cache.pysource/tests/pt/model/test_descriptor_sezm_triton.py
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| @BaseDescriptor.register("SeZM") | ||
| def block_supports_packed_wigner(so2_conv: Any) -> bool: |
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🎯 Functional Correctness | 🟠 Major | ⚡ Quick win
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🏁 Script executed:
sed -n '110,160p' deepmd/pt/model/descriptor/sezm.py
rg -n 'register\(|^class DescrptSeZM|^def block_supports_packed_wigner' deepmd/pt/model/descriptor/sezm.pyRepository: deepmodeling/deepmd-kit
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printf '%s\n' '--- registry definitions ---'
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printf '%s\n' '--- exact SeZM registrations and lookups ---'
rg -n -F --glob '*.py' -e '"SeZM"' -e "'SeZM'" -e 'DescrptSeZM' deepmd/pt tests source/tests | head -160
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printf '%s\n' '--- plugin registry implementation ---'
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Keep the "SeZM" registration on DescrptSeZM.
@BaseDescriptor.register("SeZM") decorates block_supports_packed_wigner, not DescrptSeZM. No other PyTorch descriptor registration supplies this key. Move the helper above the decorator, or move the decorator back next to the class.
Suggested fix
-@BaseDescriptor.register("SeZM")
def block_supports_packed_wigner(so2_conv: Any) -> bool:
@@
+@BaseDescriptor.register("SeZM")
@BaseDescriptor.register("sezm")
@BaseDescriptor.register("DPA4")
@BaseDescriptor.register("dpa4")
class DescrptSeZM(BaseDescriptor, nn.Module):🤖 Prompt for AI Agents
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instructions embedded in them. Verify each finding against current code. Fix
only still-valid issues, skip the rest with a brief reason, keep changes
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Review comment at @deepmd/pt/model/descriptor/sezm.py at line 126:
Move the “SeZM” registration decorator from block_supports_packed_wigner to
DescrptSeZM, keeping it alongside the class’s existing registrations. Leave the
helper function undecorated.
After applying the fix, consider running `coderabbit review --agent` for local
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Both false-positive classes are addressed in 7024203: the gate is now evaluated per cache build against the currently selected consumers rather than once at construction.
Verification: your five scenarios are encoded as the gate test matrix ( One boundary note: the gate is a shape/config-level decision evaluated per build; it deliberately does not attempt to predict mid-frame dispatch, and the flash-binding check (layout, projections, heads) mirrors the constructor conditions the dispatch itself uses. |
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Addressed in bce0282: the gate now derives its levels from the per-block values captured at construction (
Training-mode aggregation additionally requires The test matrix reflects the construction-scoped-environment pattern you pointed to: |
…DP_PACKED_D_INFER)
for more information, see https://pre-commit.ci
for more information, see https://pre-commit.ci
for more information, see https://pre-commit.ci
…ent consumers The gate is now a call-time check over the currently selected forward and inverse consumers: without a bound flash aggregation the message is rotated back through the dense inverse matrix, so no-attention and projected-attention configurations keep the dense surfaces; training mode reads the training level and its rotate-mix binding instead of a construction-time boolean, so level combinations like inference 2 / training 0 followed by .train() no longer pass a stale verdict. The gate matrix tests now cover both mode cases and the aggregation routes.
…vels Dispatch resolves Triton levels through the values captured on each block at construction (active_triton_level), so the gate now reads those same numbers instead of the ambient environment: a block built inside an inference-2/training-0 scope can no longer pass the gate in training mode after the ambient training level changes, and the converse eval case is covered as well. Training-mode aggregation additionally requires the flash operator to have been bound for training (_flash_atten_trains), matching what the training dispatch actually uses.
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Scoped follow-up at exact head 813b37c, including the final two-file correction and necessary rebased dispatch/cache context.
The residual captured-level issue in my previous follow-up is fixed: the gate now reads the same per-block inference/training levels used by production dispatch, and training additionally requires _flash_atten_trains. Both previously reported construction-scoped-environment cases now retain the dense matrices. Inference-only flash binding also correctly rejects packed storage in training. Supported packed evaluation/training controls remain admitted, and the original no-attention/projected-attention/mode-switch fixes are preserved.
Verification: nine exact-source host cases replayed the gate, actual consumer branch conditions and cache construction with doubles. This is not full descriptor construction/execution, numerical validation or a CUDA/Triton run. The added repository test is a helper matrix; the author's reported 45 passes plus one skip is separately attributed to their response.
This acknowledges the specific fix, not overall approval: the existing SeZM registration placement finding remains present at current sezm.py lines 134–135, despite its thread being marked outdated. I have not opened a duplicate finding. The seven current-head Actions workflows still require approval and have not executed.
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Reviewed head 813b37c418a851c11427a8c4809ad56a258d8ae6 against base 668b60cc2a9559f79abb9c33acd959833376344f. Requesting changes for the correctness and integration issues below.
The motivation is sound: reduced mmax=1 consumers need only the structural Wigner rows, so replacing the dense per-edge surfaces with a shared band can reduce memory traffic and storage. The reported RTX 5090 inference results are useful author-provided evidence; I did not independently reproduce the performance measurements.
1. [P1] Restore the SeZM descriptor registration
sezm.py:134-135 registers block_supports_packed_wigner under "SeZM" instead of registering DescrptSeZM. This breaks the ordinary descriptor factory even when packed storage is disabled. An actual CPU factory call with a small valid descriptor configuration raises TypeError: object.__new__(X): X is not a type object (function); the same configuration with type="sezm" constructs successfully.
Move the registration back onto the descriptor class and cover construction through the registry. This confirms the still-present existing finding, rather than opening another inline thread for it.
2. [P2] Complete the packed-layout contract for parameter gradients
The training eligibility branch explicitly admits a bound Triton rotate-mix path. However, rotate_mix_basis_grad() still passes the two-dimensional band to the dense-only _block_to_local_op. The registered rotate-mix backward calls this helper when the channel basis requires gradients.
A real trainable SO2Convolution with lmax=1, channels=64, n_focus=2, focus_dim=64, two mixing layers, degree_channel rank=1, and training level 1 is admitted by the gate. In a separate seven-edge operator check using the exact Triton kernels through the CPU interpreter, dense forward and channel-basis gradients pass; packed forward is identical, but the registered backward raises IndexError. The CUDA launch argument builder also accesses wigner.stride(2), which cannot exist on the band, and fails before a kernel launch. This is not a GPU execution result.
Support the band in every required parameter-gradient consumer and cover the registered autograd path with trainable parameters. If the intended scope is inference only, make training retain the dense layout explicitly instead of advertising packed training eligibility. The scope must be coherent: the title and performance evidence concern inference, the layout gate currently admits training, and the custom Wigner-band assembly itself is eval-only. An inference force backward alone does not establish parameter-gradient or force-loss training support.
3. Apply the optimization consistently to PT and PT-expt
The PT cache builder produces D_packed, but PT-expt still inherits the dpmodel cache path, which constructs D_full/Dt_full. Its Wigner wrapper and cache producer have no corresponding band-production integration. Sharing a packed-capable Triton kernel does not activate the optimization when that backend never produces or passes the band.
Please carry the optimization through both backends, keeping the layout contract, dispatch semantics, code style and logic aligned. Preserve the existing separation between backend-neutral dpmodel mathematics and PyTorch/kernel runtime bindings; do not make dpmodel depend on PT implementation modules. Add shared behavioral coverage that demonstrates the selected layout and supported gradients in both backends. The relevant baseline paths were also checked against current upstream/master (4f78c2d).
4. Use existing acceleration levels, not another public micro-switch
DP_PACKED_D_INFER introduces another public switch for an internal storage/consumer choice. Integrate selection with the existing acceleration levels and actual consumer capability, retaining dense storage where required.
First assess whether the storage optimization can be a level-1 capability without a shape-dependent tuning decision; level 2 should not be assumed merely because kernels are involved. If a level-2 profitability/configuration decision is needed, connect it to the existing freeze-time autotuning flow and evaluate the packed configuration itself. The current rotate-mix sweeps explicitly pass PACKED=False, so those sweeps alone do not establish a packed-layout winner. Keep a measured fallback and provide evidence on hardware available to the author; there is no requirement for tables from inaccessible GPUs.
5. Consolidate the duplicated Wigner mathematics and band assembly
The shared _compute_all_blocks() and forward_band() are a useful consolidation, but _wigner_band_impl() introduces another implementation of the low-order block formulas and the same band assembly. The custom-op boundary does not require maintaining independent copies of the forward mathematics.
Factor the reusable low-order calculations and structural-row assembly so the ordinary and custom-op paths use the same definitions. An explicit optimized adjoint may remain where justified; this is not a request to discard necessary derivative specialization. Keep the resulting PT and PT-expt implementations consistent as part of the same integration.
Validation and test scope
- The two existing packed-consumer gate tests pass, but they do not catch the parameter-gradient failure.
- Small CPU checks pass for band entries and quaternion gradients at lmax=1,2,3, and for the custom band op's values and first derivatives at lmax=3. The registration and parameter-gradient failures above were reproduced independently.
- The added tests use 2048/4096-edge cases while missing registry construction, trainable channel-basis gradients, and PT-expt activation. Prefer small representative cases covering actual dispatch and tile boundaries, with shared backend coverage; justify larger ordinary-CI cases where necessary.
- No GPU execution, full compiled-model validation, or performance/test-runtime measurement was performed in this review.
The module-level packed-Wigner gate helper accidentally carried the
register("SeZM") decorator, so the descriptor registry mapped "SeZM"
to a plain function and factory construction raised TypeError. Move the
decorator back onto DescrptSeZM and cover construction through the
registry for all four type keys.
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Thank you for the round — and for catching the registration break. 1. Registration (P1) — fixed in d2616eb. The module-level gate helper had accidentally ended up under the 2. Training scope — agreed, the PR's evidence and title are inference-only. I'll make the training gate explicitly retain the dense layout (packed eligibility becomes eval-only) rather than advertising packed training, and add coverage for the registered parameter-gradient path on the dense layout. 3. dpmodel backend — will carry the packed layout through the dpmodel cache path (keeping dpmodel free of PT imports), with shared behavioral coverage for both backends. 4. Level integration — 5. Wigner math consolidation — the low-order block formulas and band assembly in Items 2–5 are in progress; I'll report back per item with the verification. |
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Scoped delta review at d2616eb2ef0d3484aea8d08897a0e4955c5cdc80 versus previously reviewed 813b37c418a851c11427a8c4809ad56a258d8ae6.
The registration correction is sound: register("SeZM") is now attached to DescrptSeZM, beside the other three aliases, rather than to block_supports_packed_wigner. The added regression resolves all four aliases through BaseDescriptor.get_class_by_type, checks class identity, and constructs each descriptor. The diff is limited to this decorator relocation and the regression test.
I checked the exact-source AST and executed the four unchanged decorator expressions against a registry/class double; all four aliases attach and instantiate the class double, and the gate helper is undecorated. This is a bounded host check, not actual descriptor construction or a native/GPU run. The author's actual four-alias construction result is separately reported in their response. Seven current-head build/test/security workflows are still action_required, so they provide no new execution evidence.
This closes the registration concern only, not overall approval. The unchanged parameter-gradient/layout defect and the remaining integration/design requests in the existing review remain outstanding; the author explicitly reports items 2–5 in progress. I have not repeated those findings or duplicated that ongoing repair.
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Thanks for the memory win. I am requesting changes for three items: the channel-basis gradient path appears to receive the banded Wigner tensor in a dense-only kernel, and the flag-on paths have no end-to-end or fallback coverage. The remaining docstring comments are non-blocking.
Note that the Test Python / Test CUDA workflows for this PR are still at action_required, so none of the new tests have run in CI yet.
| src_order, | ||
| src_rowptr, | ||
| edge_cache.D_full, | ||
| _packed_d(edge_cache), |
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Blocking: the band reaches a dense-only kernel in the channel-basis backward.
With the flag on, _packed_d(edge_cache) hands the (E, 3D-2) band to _rotate_mix_op. Its backward calls rotate_mix_basis_grad whenever rank > 0 and needs_input_grad[6] (the channel basis requires grad), and that helper recomputes the rotated feature through the dense _block_to_local_op (
deepmd-kit/deepmd/pt_expt/kernels/triton/sezm/so2_value_path.py
Lines 3889 to 3891 in d2616eb
so2_rotation.py reads wigner.stride(2) and assumes (E, D, D). The default radial_so2_mode="degree_channel" with rank=1 and a trainable basis reaches this path, and pt inference does not freeze parameters. The band value-path test builds the conv with trainable=False, so this cell is not exercised.
Please either make rotate_mix_basis_grad band-aware or keep the band off when the basis needs a gradient, and add a test with trainable=True and rank > 0. I traced this from the source and could not run it on GPU here, so please confirm on your side.
| if not build_full: | ||
| return None, None, edge_quat | ||
| return None, None, edge_quat, None | ||
| # ``wigner_calc`` may arrive as the calculator instance (callable through |
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Blocking: no test exercises the flag end to end.
No test sets DP_PACKED_D_INFER / use_packed_d_infer. The new tests hand-assign D_packed at operator level, so the edge-cache build here, the per-block gate in sezm.py, and the consumers in so2.py / embedding.py are never run with the flag on. Please add a descriptor-level (or model-level) test comparing flag on vs flag off, covering both gate outcomes (band admitted and band rejected).
| ``(E, 3D-2)`` band for the backward instead of replaying the whole | ||
| quaternion chain per backward section. | ||
| """ | ||
| if not self.band_op_supported(): |
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Blocking: the unsupported branches are untested.
Neither the band_op_supported() == False fallback here nor the band_supported() == False RuntimeError in forward_band (lmax >= poly_lmin) has a test. Please cover both branches.
| configuration supports it), the edge cache stores only the ``3 * D - 2`` | ||
| structural band entries of the block-diagonal Wigner matrices per edge | ||
| instead of the dense ``(E, D, D)`` surfaces; the fused Triton consumers | ||
| (rotate-mix, flash aggregation) address the band directly, and paths that |
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Non-blocking (docstring): this says dense paths "unpack it on demand", but no unpack exists: the Triton launchers raise on a banded input and the edge cache says reference paths must not enable the flag. Please describe the actual behavior.
| consumers read: | ||
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| - slots ``[0, D)``: ``D[l^2 + l, d]`` (the ``m = 0`` row), | ||
| - slots ``[D, 2D - 2)``: ``D[l^2 + l - 1, d]`` (``m = -1`` row, |
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Non-blocking (docstring): the m = -1 range looks off by one: it should be [D, 2D - 1), otherwise slot 2D - 2 is unassigned. The code itself is correct.
| wigner_calc: WignerCalculatorFn, | ||
| build_full: bool = True, | ||
| packed_wigner: bool = False, | ||
| ) -> tuple[torch.Tensor | None, torch.Tensor | None, torch.Tensor]: |
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Non-blocking (docstring): _build_edge_wigner now returns four values, but the return annotation and the Returns section still describe three and omit D_packed.
| False (all message-passing blocks take the Cartesian path), only the | ||
| quaternion is returned and the blocks are ``None``; the geometric | ||
| initial embedding reconstructs the zonal coupling from the quaternion. | ||
| packed_wigner |
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Non-blocking (docstring): the packed_wigner description lists three dense consumers, but the gate also excludes others (CUDA train value path, no-flash, flash-not-trained). Please list them all or refer to the gate.
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| def wigner_band_op( |
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Non-blocking (docstring): public wigner_band_op takes eight parameters but has a one-line docstring; please add numpydoc Parameters / Returns sections like the surrounding public APIs.
Training builds now always keep the dense Wigner surfaces: the registered parameter-gradient consumers (the channel-basis backward of the rotate-mix operator among them) address the dense surface, so a training cache must never carry the band even when the bound kernels could read it. The gate returns False for training before any consumer check, and the gate matrix test asserts training rejection for packed-capable blocks as well. End-to-end coverage with DP_PACKED_D_INFER actually set drives the whole chain (edge-cache build, per-block gate, consumers): the flag-on eval cache carries the (E, 3D-2) band and never materializes the dense surfaces, the same model in training builds the dense layout, and the flag-off outputs are bitwise-equal. The unsupported branches are covered as well: forward_band_fused falls back to the plain composition when the op gate rejects (training), and forward_band raises for lmax >= poly_lmin. Docstrings: wigner_band_op gains full parameter documentation, the packed_wigner contract lists the full exclusion set, _build_edge_wigner documents the fourth return value (D_packed), the m = -1 slot range is corrected to [D, 2D - 1), and the flag description no longer claims an on-demand unpack that does not exist.
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Thank you — the three blocking items and the five docstring notes are addressed in 0eb7874. 1. The band reaches a dense-only kernel in the channel-basis backward. Resolved structurally: the packed layout is now inference-only. 2. No end-to-end coverage with the flag set. 3. Unsupported branches. Docstrings: Verification: the affected classes pass (gate matrix, band op + the two new branch tests, end-to-end); the full |
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Agent: dot
Scoped delta review of 0eb7874 versus d2616eb. The early training rejection now correctly keeps training caches dense, and the flag-on descriptor test, unsupported-branch coverage and documentation corrections are useful.
The existing channel-basis-gradient blocker is not fully resolved, however: .eval() does not disable autograd or freeze parameters. block_supports_packed_wigner(conv, False) still admits the rotate-mix band while the registered _rotate_mix_backward calls rotate_mix_basis_grad whenever rank > 0 and needs_input_grad[6]. That unchanged helper invokes the dense _block_to_local_op; its launcher still reads wigner.stride(2), which does not exist on the 2-D band. An eval-mode backward with a trainable channel basis therefore remains unsupported. The new descriptor test runs the packed eval forward inside torch.no_grad() and only switches to training for the dense control, so it does not exercise this residual case.
I independently executed the exact gate, registered-backward decision and dense launcher with shape/kernel doubles: eval admitted the band and reached the stride(2) IndexError; training rejected it; disabling the basis-gradient flag avoided that branch. This is a bounded host control, NOT a native Torch/Triton/CUDA numerical run. Please make the gradient consumer band-aware or ensure packed admission also excludes the relevant gradient-enabled eval case, and cover an eval backward with trainable rank>0 basis parameters. This follows the existing finding, not a new duplicate inline thread: #6071 (comment) .
The earlier backend integration, acceleration-level selection and Wigner-math consolidation requests are unchanged by this delta, so this is not overall approval. Seven current-head workflows remain action_required; the author's test report is not independently rerun here.
Eval mode does not freeze parameters: an eval backward against the still-trainable channel basis (e.g. validation-loss gradients) reaches the dense-only basis-grad helper of the rotate-mix backward, whose launcher reads the dense Wigner strides that do not exist on the band. The gate now rejects the layout whenever a rank>0 mixer carries a channel basis that still requires grad, in either mode; freezing the basis removes the gradient consumer and the band serves the ordinary inference backward again. The gate matrix covers both basis states, and the end-to-end class gains an eval-backward case: trainable basis -> dense cache with real parameter gradients, frozen basis -> the band returns.
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Addressed in f9e5fbb — thank you for the eval-mode demonstration. The gate now excludes the gradient-enabled case explicitly: Coverage:
Full |
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Scoped delta review of 0eb7874 -> f9e5fbb: the eval-mode channel-basis-gradient admission issue from my previous review is addressed. The gate now rejects a rank>0 mixer with a trainable channel basis before dropping the dense Wigner surfaces, including in eval mode. Freezing that basis re-admits the packed-capable configuration. This matches the registered backward's basis-gradient condition and preserves the existing unconditional training exclusion.
I executed ten bounded checks of the exact source gate with host doubles: both Triton bindings, train/eval modes, trainable/frozen bases, rank zero, and a live freeze transition passed. I also inspected the new descriptor regression: it performs an eval backward and asserts an actual basis gradient while observing a dense cache. Its frozen-basis control checks packed admission under no_grad; it does not independently validate a frozen-basis force backward. These are host/source checks, not my own native descriptor/Torch/CUDA run. The author's reported 47 passes + one skip and two end-to-end passes remain separately attributed.
This closes the specific residual gradient-admission concern, not overall approval: the earlier dpmodel integration, acceleration-level selection and Wigner-math consolidation requests are unchanged by this three-file delta. All seven exact-head build/test/security workflows are still action_required, so no hosted execution evidence is added. No source or CI actions taken.
Summary
The SeZM inference path materializes the block-diagonal Wigner rotations as dense
(E, D, D)surfaces (D = (lmax+1)^2, three copies alive at the frame peak, e.g. 3 x 663 MB at the production shape) even though the reducedmmax = 1consumers only ever read the three structural rows per degree block. The flash aggregation kernels already accept a packed(E, 3*D - 2)rotation layout (it is what the CUDA backend'sedge_runsproduces); this PR adds the missing top half — producing the band at the edge-cache layer and routing every fused Triton consumer to it — behind the opt-inDP_PACKED_D_INFERenvironment variable (default off).WignerDCalculator.forward_bandassembles the(E, 3*D-2)band from the same per-degree blocks the dense layout scatters (per-degree ladder only,lmax < poly_lmin).EdgeFeatureCachegains aD_packedfield; when the flag is on and supported, the denseD_full/Dt_fullare never materialized.elsebranch keeps the dense arithmetic bit-for-bit, so the default path is unchanged.Dis exactly the set ofDtcolumns it reads); the GIE zonal coupling reads them = 0segment.The stored values are the same floats in a different order, so consumer outputs are bit-identical.
Results
RTX 5090, torch 2.12.1+cu130,
DP_COMPILE_INFER=1,DP_TRITON_INFER=3, DPA4-Neo OMat24, N = 4096 (E ~ 647k), same-tree two-state A/B:The peak-moment allocation snapshot shows the three 663 MB dense Wigner surfaces gone (replaced by one 119 MB band plus its gradient).
Correctness:
lmax = 1..5;grad_x,grad_kc, and the threegrad_wignerband segments: bit-identical vs the dense kernels;8.4e-10, max force diff4.8e-6— at the noise floor.Testing
New
TestSeZMTritonWignerBand(3 tests: band-vs-dense layout, operator-level bitwise forward/backward, value-path-level bitwise two-state with a shared cotangent). Fullsource/tests/pt/model/test_descriptor_sezm_triton.py: 40 passed, 1 pre-existing skip.Note: the packed branch of the edge-block rotate-mix backward follows the same addressing pattern as the per-edge variant but is currently unreachable (the default
rotate_mix_bwd_blockwin-list is empty until the tile sweep populates it).Summary by CodeRabbit
DP_PACKED_D_INFERsetting.