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[SL3 Intel] S0ix breaks after reboot, works again after poweroff/hibernate #2279

Description

@cgernert

Environment

  • Surface Laptop 3 Intel
  • i5-1035G7
  • UEFI 19.101.140
  • CachyOS
  • currently kernel 7.2.2-1-cachyos
  • only s2idle available

I ran into a weird S0ix issue on my SL3.

After a full shutdown and power-on, S0ix works fine. A 30 second suspend usually gives me around 29 seconds of S0ix residency.

I use this to test it:

D=/sys/kernel/debug/pmc_core
before=$(sudo cat "$D/slp_s0_residency_usec")
sudo rtcwake -m mem -s 30
after=$(sudo cat "$D/slp_s0_residency_usec")
echo $((after-before))

Typical result after a cold boot is around 29,000,000 µs.

After a normal reboot, the exact same test gives 0.

This is reproducible. A full poweroff followed by powering the laptop on again fixes it immediately.

Hibernation fixes it too. If S0ix is broken after a reboot, running systemctl hibernate and resuming brings it back to around 29 seconds again.

So for me it boils down to:

  • poweroff + power on: S0ix works
  • reboot: S0ix broken
  • hibernate + resume: S0ix works

I also tried pm_test=platform and test_resume while in the broken state. Neither fixed it, so it seems to need an actual deeper platform power transition.

While broken, intel_pmc_core logs:

CPU did not enter SLP_S0!!! (S0ix cnt=0)

and slp_s0_debug_status shows, among other things:

PCIE_LOW_POWER No
XOSC_OFF No
PMC_ARC_PG_READY No

Package C10 still works and sits around 93-94%, so the CPU itself does reach deep idle.

I reproduced the same behavior with these kernels:

  • 7.2.2-1-cachyos
  • 7.2.2-arch1-1
  • 6.18.48-1-lts
  • 6.19.8-arch1-3-surface
  • 6.14.10-arch1-1

I also tested two different NVMe drives, a Phison E13T and an SK hynix BC501, with no difference.

So this doesn't look kernel- or SSD-specific to me. My guess is that some platform state survives a warm reboot and prevents S0ix until the machine goes through a full poweroff or real hibernate cycle.

Current workaround is simply avoiding reboot if I want suspend to work properly.

I can provide more PMC output or test patches if useful.

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