Skip to content

Add targeted_ops to core ExportPass passes for fast-copy optimization (#21702) - #21702

Open
apullin wants to merge 1 commit into
pytorch:mainfrom
apullin:export-D96247716
Open

Add targeted_ops to core ExportPass passes for fast-copy optimization (#21702)#21702
apullin wants to merge 1 commit into
pytorch:mainfrom
apullin:export-D96247716

Conversation

@apullin

@apullin apullin commented Aug 9, 2026

Copy link
Copy Markdown
Contributor

Summary:

Annotate four core ExportPass subclasses with targeted_ops matching their existing rewrite guards:

  • MemoryFormatOpsPass uses the DimOrderOpsMap keys.
  • DimOrderOpsRevertPass uses the MemoryFormatOpsMap keys.
  • NormalizeTransposePass targets aten.t.default.
  • RemoveMixedTypeOperators targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the ExportPass fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716

@pytorch-bot

pytorch-bot Bot commented Aug 9, 2026

Copy link
Copy Markdown

🔗 Helpful Links

🧪 See artifacts and rendered test results at hud.pytorch.org/pr/pytorch/executorch/21702

Note: Links to docs will display an error until the docs builds have been completed.

⏳ No Failures, 1 Pending

As of commit 7382466 with merge base 4ce2ec2 (image):
💚 Looks good so far! There are no failures yet. 💚

This comment was automatically generated by Dr. CI and updates every 15 minutes.

@meta-cla meta-cla Bot added the CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. label Aug 9, 2026
@github-actions github-actions Bot added ciflow/trunk module: arm Issues related to arm backend labels Aug 9, 2026
@meta-codesync

meta-codesync Bot commented Aug 9, 2026

Copy link
Copy Markdown
Contributor

@apullin has exported this pull request. If you are a Meta employee, you can view the originating Diff in D96247716.

@github-actions

github-actions Bot commented Aug 9, 2026

Copy link
Copy Markdown

This PR needs a release notes: label

If your change should be included in the release notes (i.e. would users of this library care about this change?), please use a label starting with release notes:. This helps us keep track and include your important work in the next release notes.

To add a label, you can comment to pytorchbot, for example
@pytorchbot label "release notes: none"

For more information, see
https://github.com/pytorch/pytorch/wiki/PyTorch-AutoLabel-Bot#why-categorize-for-release-notes-and-how-does-it-work.

@meta-codesync meta-codesync Bot changed the title Add targeted_ops to core ExportPass passes for fast-copy optimization Add targeted_ops to core ExportPass passes for fast-copy optimization (#21702) Aug 10, 2026
apullin added a commit to apullin/executorch that referenced this pull request Aug 10, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses across three files with `targeted_ops` so they participate in the cold-node fast-copy path introduced by parent D97528110.

When fast-copy remains safe, D975 copies eligible non-targeted `call_function` nodes with existing `val` metadata instead of replaying them through FakeTensor dispatch. This diff does not add generic pass skipping: every pass still enters replay, and hot nodes continue through each existing `call_operator` implementation.

Each set exactly mirrors the rewrite guard already present in its pass:

- `MemoryFormatOpsPass` targets `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` targets `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets `add.Tensor`, `mul.Tensor`, `sub.Tensor`, both tensor `div` overloads, and `minimum.default`.

The diff is now stacked directly on D97528110, which owns the consumer infrastructure. Its previous D109215317 parent left these attributes inert.

Direct raw-graph regressions prove that transpose normalization and mixed-type rewriting still dispatch hot operators while eligible unrelated operators bypass `call_operator`; the mixed-type test also verifies inserted promotion casts and output dtypes.

A/B against D97528110 on the same host, with each revision run twice:

- Synthetic add/conv/fc/mul U55 suite: 79.000s / 79.516s here versus 81.238s / 82.371s in D975. Mean speedup 3.1%; warmed speedup 3.5%.
- CombinedControl U55 LOWERING: 145.801s / 145.888s here versus 148.465s / 149.726s in D975. Mean speedup 2.2%; warmed speedup 2.6%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Aug 10, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses across three files with `targeted_ops` so they participate in the cold-node fast-copy path introduced by parent D97528110.

When fast-copy remains safe, D975 copies eligible non-targeted `call_function` nodes with existing `val` metadata instead of replaying them through FakeTensor dispatch. This diff does not add generic pass skipping: every pass still enters replay, and hot nodes continue through each existing `call_operator` implementation.

Each set exactly mirrors the rewrite guard already present in its pass:

- `MemoryFormatOpsPass` targets `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` targets `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets `add.Tensor`, `mul.Tensor`, `sub.Tensor`, both tensor `div` overloads, and `minimum.default`.

The diff is now stacked directly on D97528110, which owns the consumer infrastructure. Its previous D109215317 parent left these attributes inert.

Direct raw-graph regressions prove that transpose normalization and mixed-type rewriting still dispatch hot operators while eligible unrelated operators bypass `call_operator`; the mixed-type test also verifies inserted promotion casts and output dtypes.

A/B against D97528110 on the same host, with each revision run twice:

- Synthetic add/conv/fc/mul U55 suite: 79.000s / 79.516s here versus 81.238s / 82.371s in D975. Mean speedup 3.1%; warmed speedup 3.5%.
- CombinedControl U55 LOWERING: 145.801s / 145.888s here versus 148.465s / 149.726s in D975. Mean speedup 2.2%; warmed speedup 2.6%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 2, 2026
…pytorch#21702)

Summary:
Pull Request resolved: pytorch#21702

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 2, 2026
…pytorch#21702)

Summary:
Pull Request resolved: pytorch#21702

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
@JakeStevens
JakeStevens removed their request for review September 2, 2026 15:50
apullin added a commit to apullin/executorch that referenced this pull request Sep 2, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 2, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 3, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 3, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 3, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
apullin added a commit to apullin/executorch that referenced this pull request Sep 6, 2026
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
…pytorch#21702)

Summary:

Annotate four core `ExportPass` subclasses with `targeted_ops` matching their existing rewrite guards:

- `MemoryFormatOpsPass` uses the `DimOrderOpsMap` keys.
- `DimOrderOpsRevertPass` uses the `MemoryFormatOpsMap` keys.
- `NormalizeTransposePass` targets `aten.t.default`.
- `RemoveMixedTypeOperators` targets the operators handled by its promotion path.

These declarations enable eligible non-targeted nodes to use the `ExportPass` fast-copy path, improving CombinedControl U55 lowering by ~3%.

Differential Revision: D96247716
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

ciflow/trunk CLA Signed This label is managed by the Facebook bot. Authors need to sign the CLA before a PR can be reviewed. meta-exported module: arm Issues related to arm backend

Projects

None yet

Development

Successfully merging this pull request may close these issues.

1 participant