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Changing BASEPRI should have an ISB after it to ensure it has taken affect by the time the next instruction runs (which could be a load or store that is relying on certain interrupts being masked off).
Activity
thejpster commentedon Oct 19, 2026
https://support.arm.com/documentation/107706/0100/Exceptions-and-interrupts-overview/Special-registers-for-exception-masking/PRIMASK
PRIMASK and FAULTMASK also need an ISB
Add ISB after writes to PRIMASK and BASEPRI. Closes #702.
adamgreig commentedon Oct 25, 2026
Sorry, this was done by #703 but GitHub failed to close the issue.