[atomchild411]

cpu: mark an exception vector as a compile-worthy arrival

jitv2 requests a compile where execution lands on a page's word 0 or after a taken branch or jump. Exception delivery writes PC straight to the vector, and of the vectors only the 32-bit TLB refill sits on word 0. The XTLB refill (0x080) and the general vector (0x180) were never requested, so their handlers always ran in the interpreter: every TLB invalid/modified fault, syscall and interrupt entry on every machine, and every TLB refill on a kernel that runs with UX set.

The change

deliver_exception_at sets jit_trigger after it has set PC to the vector (jitv2 builds only). A trigger at an entry that is already compiled costs nothing; dispatch just runs it.

Measured

cpubench (integer, branches, L1/L2/miss reads, memset, indirect calls, syscalls, FP), interleaved with main over two rounds on each machine, on a quiet-ish host:

	main	this PR
Indy (R4400, IRIX 6.5.22): 32 MB miss read (page-fault heavy)	201, 176 Mline/s	212, 218 Mline/s
Indy: everything else, and the total	13.7 s	13.7 s
IP28 (R10000, IRIX 6.5.22): every test	13.6 s total	13.6 s total, all within noise

On the Indy the page faults of a fresh 32 MB sweep enter through the general vector, which is now compiled: about +14%. The IP28's IRIX runs its n32 programs with 32-bit refills (word 0), so nothing changes there. Where it matters most is a kernel that takes the XTLB refill for everything: on an emulated O2 (IRIX, UX set), a 5 s memory sweep went from 43M to 9M interpreted instructions.

Tests

• cargo test --lib: all pass, apart from breakpoints_can_be_set_while_running_and_report_their_hit and udp_fragmented_both_ways, which fail the same way on main here. Built in the three CI configurations.
• Every benchmark run above was a full windowed boot with hinv, disk read and write, CD, audio, network, X, a keyboard login and a clean shutdown: all passed.

🤖 Generated with Claude Code