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rex3: pin the IRIX 7 auxiliary-plane clear against the JIT - #320

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techomancer merged 1 commit into
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irix7:pr/rex3-aux-clear
Oct 25, 2026
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techomancer merged 1 commit into
techomancer:mainfrom
irix7:pr/rex3-aux-clear

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@belikh

@belikh belikh commented Oct 25, 2026

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IRIX 7's kernel clears the overlay, popup and CID planes with three full-screen 1280x1024 block fills at the top of gfx::init, before VC2/XMAP/RAMDAC programming. A bug in that shape traps the guest with no graphics output, so it is worth pinning exactly.

The test runs the kernel's register sequence (DRAWMODE1 planes 4/5/6 with 24-bit RGB, WRMASK 0x00FF_FFFF, zero colours, XYENDI 1279,1023, XYSTARTI 0,0, DRAWMODE0 = 0x0306) on both engines and requires:

  • the compiled shader matches the interpreter pixel-for-pixel (the full 8 MB aux buffer is compared);
  • the fill clears the 24 plane bits of every screen pixel and leaves the top byte alone, as WRMASK says;
  • nothing is written outside the 1280-wide screen (sentinel check at x=1280/2047);
  • STATUS is idle afterwards, so the guest's wait_idle returns;
  • no primitive is left mid-flight.

Evidence: this is the conformance test itself — it fails if the aux-plane base, the bounds check, the FIFO drain or the block-fill writeback regresses.

Tests: cargo test -p iris --lib --features rex-jit dev::ng1::rex3::tests::jit_tests::jit_full_screen_aux_clear_like_irix7 — 1 passed; the rest of the REX3 suite passes unchanged.

The IRIX 7 kernel's gfx::init clears OLAY, PUP and CID with three full-screen 1280x1024 block fills before it touches anything else. Exercise that exact register sequence on both engines and require: the compiled path matches the interpreter, no write past the 1280th column, STATUS idle afterwards (the guest's wait_idle polls it), and no primitive left mid-flight.
belikh added a commit to irix7/iris that referenced this pull request Oct 25, 2026
Cache default reverted (e7a7f62), VCE branch confirmed already converged, REX3 aux-clear test and NFS host-MAC fix opened as upstream techomancer#320/techomancer#321.
@techomancer
techomancer merged commit 558be8e into techomancer:main Oct 25, 2026
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belikh added a commit to irix7/iris that referenced this pull request Oct 25, 2026
techomancer#319, techomancer#320 and techomancer#321 are merged upstream and merged back; the send queue is renumbered around them.
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